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Proposal Number: 7482

Domain: Information & Communication Technology

Theme(s): CAD for Reliability and Safety
ICT Tools for Healthcare and Assistive Technology
Industrial and Medical Internet of Things
Smart City

Supporting Central Government Agency:

Budget (Rs. Lakhs): 40.46

Principal Investigator: Dr. Bibhas Ghoshal

Principal Investigator Institute: Indian Institute of Information Technology Allahabad

Co-Investigators:
Professor Indranil Sengupta ,Indian Institute of Technology Kharagpur

Domain: Information & Communication Technology

Project Title

Power Aware Compiler for Embedded Processors

Web Abstract

As embedded systems are becoming more computationally intensive, power consumption has gained importance vis-a-vis performance. Software based control of different components in embedded devices has paved the way for development of compilation and operating strategies to reduce power dissipation in these devices. However, research suggests that majority of low power optimization techniques have been by-product of performance optimizations. In this work, we wish to explore different compiler based optimization techniques specifically targeting low power embedded devices and then develop these techniques as libraries which can be integrated in any compilation flow for embedded systems. Next, each of the considered technique would be evaluated for its benefit by performing physical measurements on different target systems for a set of representative benchmarks. Finally, we plan to integrate the developed libraries in LLVM compiler infrastructure framework to provide a complete power aware compiler solution for embedded devices.